sureCore has identified a need in the market for low power memory to support several emerging major technologies such as IoT, wearable and medical applications that mandate “keep alive” memory. Standard SRAM is not reliable below 0.9V, but sureCore’s single supply rail, Ultra-Low Voltage SRAM IP allows operating voltage to scale in tandem with the logic. sureCore’s IP delivers at a record-setting 0.6V across process, voltage and temperature. It provides an unprecedented 20MHz cycle time at 0.6V scaling to over 300MHz at 1.21V. Test chip results revealed an up to 80% savings in dynamic power consumption and an up to 75% reduction in static power. Key is sureCore’s patented “smart-Assist” technology that allows robust operation down to the retention voltage. Further architectural improvements include subdividing the memory into up to eight banks, which, in conjunction with enhanced sleep modes, provide greater system level flexibility. As well as operating in peripheral power off, light and deep sleep modes, each bank can also be independently controlled for active or in light sleep, deep sleep or power off modes. sureCore’s 40nmULP process technology memory compiler was launched in June 2016 and has been proven in silicon. The company also has a 28nm FDSOI compiler and is currently working on additional compilers at various technology nodes. For the first time, devices in ‘Keep Alive’ mode can deliver useful processing power at unprecedented low power levels. The huge reduction in power consumption will enable devices to keep going for far longer enabling sureCore to establish itself as the Architects of Low Power Memory. 40nm is a mature node that is a sweet spot that enables solutions for IoT and wearable devices to be cost effectively designed and produced, which is why sureCore has targeted 40nm for its low power IP as it provides a huge global potential market.